๐Ÿ‘ฝ warpengineer

This was a pretty fun read. A lot more operating system than CPU but still fun. https://cpu.land/

5 months ago ยท ๐Ÿ‘ justyb

Links

[1] https://cpu.land/

Actions

๐Ÿ‘‹ Join Station

3 Replies

๐Ÿ‘ฝ justyb

Finally, registers on modern CPUs are no longer directly accessible. The CPU has a wide array of circuits called latches that act as the registers. There is a circuit that may take latch 01 and assign it as the AX register for a particular unit of work.

Register renaming is an incredibly useful tool to make pipelines very efficient. Your compiler might take your code and try to reuse a register to move two different bytes of data to RAM. Your CPU can see this and instead have byte one in latch 01 and the other in latch 02. Now the pipe can flush both bytes at the same time from the two different latches. ยท 5 months ago

๐Ÿ‘ฝ justyb

Another thing is that CPUs do not fetch, then decode, and then execute. Instead modern CPUs have pipelines that fetch, decode, and execute all at the same time. These long pipes are doing all kinds of things to ensure every clock tick has something executing.

A very simplistic pipe might be a circuit that fetches memory location n, a circuit that decodes memory location n-1 (that is the memory location that the fetch circuit just got done fetching), and a circuit that executes memory location n-2 (the memory location the decode circuit just got done decoding). ยท 5 months ago

๐Ÿ‘ฝ justyb

Something to note. The simplistic view provided is correct for 1970s and early 1980s CPUs. Modern CPUs do not fetch every instruction from RAM, this would be painfully slow even with modern DDR5 RAM. Instead a block of RAM is transferred ahead of time of need into the hierarchy of L1, L2, and L3 cache. Access time between L1 and RAM is nearly 100 times faster. So the actual next instructions are there in L1, not RAM.

The "how" a CPU knows which block to pull in from RAM is an interesting topic in of itself. ยท 5 months ago