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DIY CPUs and other hardware
Built Many Nano9K systems! — I've been on a bender making FPGA computers using this $20 board: An experimental 18-bit stack machine CPU with UART with a WLIW-like quirky instruction architecture. Running forth on bare metal. A 65c02 system with 48KB and UART James Bowman's J1 CPU with UART. Tugman above is based around this system, but is more advanced and takes up fewer resources.
💬 View post · Sep 05 · 3 months ago
Built a Tang Nano 9K UART transmitter — I thought I'd swipe a UART from some other project, but they are all horribly written by engineering students or maybe ChatGPT -- pages of state machines just to transmit! So I rigged up a shift register to spit out serial. The core is 5 slices. Plus the timing generator to set the baud rate. It took me way too long, but I am getting my verilog legs back. [https link]
💬 1 like · Aug 04 · 4 months ago
A 6502 on a $20 Tang Nano 9K — Ah, after some fiddling, got a minimal 6502 system flashing an LED. Running at stock 27MHz, with 2K RAM and 2K ROM. The FPGA has 48K of block RAM and an HDMI interface, so I could build, say, a credible Apple 2, or an Atari -- the CPU consumes just over 10℅ of resources. There is also an SD card interface and an 64mbit SDRAM, and a bunch of Flash, and an LCD interface... Not bad for $20.
💬 11 comments · 2 likes · Jul 30 · 5 months ago
FOSS tools for Sipeed Tang Nano 1K — A resounding success! After a false start, I got yosys, nextpnr and apycula working together beautifully. A simple blinky synthesizes and places/routes in around 2 seconds (on my 10+ year-old equipment). The toolchain installs very easily, just following the github instructions. Make sure to compile yosys with the GUI enabled -- it is disabled by default! I normally use a Makefile, but the GUI lets you load your design into an FPGA-editor-like environment,...
💬 View post · Jul 13 · 5 months ago
Nano 1K hidden RISC-V — So this $10 FPGA devboard has what I thought was an FT2232D chip for USB, but no! It is actually a BL702, Sipeed's 'debug chip', a RISC-V SOC... BL702 is highly integrated BLE and Zigbee combo chipset for IoT applications, contains 32-bit RISC-V CPU with FPU, frequency up to 144MHz, with 132KB RAM and 192 KB ROM, 1Kb eFuse, 512KB embedded Flash, USB2.0 FS device interface, and many other features. I suppose it's not as weird as, say, an ARM7 SOC on every SD card... I...
💬 3 comments · Jul 10 · 5 months ago
FOSS FPGA Tools — I am going down this rabbithole again. Since the last time I looked, a ton of new stuff appeared: Yosys - now pretty mature. A synthesis tool. Nextpnr - a placement/routing tool for Gowin and Lattice devices Apicula, a Gowin bitstream handler It seems that the Gowin devices have largely been reverse-engineered, and it is theoretically possible to use the FOSS tools to generate bitstreams, and more importantly for me, gain a fuller understanding of the underlying hardware and...
💬 2 comments · Jul 09 · 5 months ago
A friend of mine recently created a C64 for the analogue pocket (FPGA in gameboy shape) [https link]
💬 3 likes · Jul 08 · 5 months ago
GOWIN Chinese FPGAs — I haven't done much with FPGAs for a bunch of years. Kind of got disgusted by the proprietary hardware, terrible tools, and general awfulness of verilog (and god forbid, VHDL). Also, modern CPUs can emulate most things I want from FPGAs, but much faster and neater (less physical space, which is at a premium)... But I couldn't resist buying a little $10 Sipeed boards with Gowin FPGAs (Nano1K). I should've spent the extra $10 for a much more useful 9K, or even 20K (still...
💬 2 comments · 1 like · Jul 07 · 5 months ago
Any FPGA enthusiasts here?
💬 View post · Jul 02 · 6 months ago