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โฌ ๏ธ Previous capture (2024-08-19)
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I am going down this rabbithole again. Since the last time I looked, a ton of new stuff appeared:
It seems that the Gowin devices have largely been reverse-engineered, and it is theoretically possible to use the FOSS tools to generate bitstreams, and more importantly for me, gain a fuller understanding of the underlying hardware and routing resources of the Gowin chips (which seems to be fairly primitive).
So I need to compile yosys (about 30 minutes in so far). I will report my findings when I get something working.
Jul 09 ยท 8 weeks ago
๐ stack [OP/mod] ยท Jul 09 at 20:47:
Oh, god, why? Slow as garbage, impossible to figure out, enormous... Nothing changes with these things...
๐ stack [OP/mod] ยท Jul 11 at 22:16:
I take it back! I got it to work, made a Makefile, and a simple blinky takes about 3 seconds to build, 3-4 times faster than the Chinese toolchain!
I haven't had a chance to mess with the GUI of nextpnr, the place/route tool, and it looks pretty much like the Xilinx FPGA editor, with all the gory details of the cells, routing blocks, wires, and such.
On the other hand, the Chinese GUI IDE is really barren, and its version of the FPGA editor shows next to nothing, and figuring out what components are placed where (to constrain) is nearly impossible.
I was feeling really desperate, and decided to try the opensource tools again, and yes! Life is full of potential!