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I've spent most of my adult life laying out PCB boards (not all the time...). I go through phases when I do a lot of PCB layout. I've used various software to do so, but in the end, my favorite way to do it is punking it with PCB.
The reasons I like it:
This may not match your workflow: painstakingly entering the schematic, picking packages, labelling everything, messing with the enormous ratnests...
As someone who apreciates Forth, I do it the other way around, bottom-up.
I don't bother with schematic until the end (if at all - many times I don't bother at all, or lose interest in the project for one reason or another). I can't tell you how many times a client bailed or I wound up with an off-the-shelf solution, or entirely switched gears and used a different circuit!
I used to do it 'the right way', but that requires constantly going back to the schematic and fixing it.
And modern schematics, especially those involving FPGAs and wide CPUs or microcontrollers are next-to-useless - you wind up breaking them into functional parts, joining buses, etc.
Finally, the back-annotation process is generally painful. I can't tell you how often I need to make a small change at the PCB level - adding a jumper or re-assigning a data bus line. Getting those changes back into the schematic is invariably a battle of wits. At other times, not getting the changes back while retaining a semblance of congruence between the PCB and the schematic is even more difficult!
That is why I punk it.
GEDA PCB footprints are described as text (as is everything else). Somehow I can rarely find footprints for the devices I use - be they weird connectors from AliExpress or retrocomputing new-old-stock -- so I wind up making lots of footprints. Some are made by modifying the textual description of existing ones - say a 65C02 from a generic 40-pin DIP. Others, like complex BGA parts can be built algorithmically - on several occasions I've written quick Common Lisp programs to spit out grids I needed.
Yeah, text files.
After placing the devices and turning on the pin labels (I make sure that footprints carry labels that make sense), the fun begins.
GEDA PCB can read text files containing nets and showing them as ratnests. This is an incredible feature: unlike most other packages, it is up to you to create these netlists. Unlike most packages, you don't have to see them all at once. You can keep them in separate files!
For example, when building an FPGA project, I can create a separate netlist file for each of the power rails - say 3V3, 2V5, 1V2, and ground - as separate files. I can then load a file and look at the ratlines - and there aren't that many of them! I can route them one net at a time.
Here is a typical 3.3V power netlist for a small Xilinx FPGA:
3V3 XC3S50-6 XC3S50-19 XC3S50-31 XC3S50-46 XC3S50-57 XC3S50-70 XC3S50-83 XC3S50-94
I can create a netlist for a data bus or an address bus connecting memories. I can create a control netlist, or a configuration circuit netlist. Or combine any number of them, all using my favorite text editor and a few well-named files and directories!
And so my OCD gets satisfied as I painstakingly connect the nets, occasionally revising stuff as I go.
It is a bit brutal, as there is no way to nudge or pack conductors - you have to rip up an area and reconnect things. But it is straightforward, and you almost never wind up tearing out your remaining hair because the software is doing something bizzare.
The .pcb file built from your wysiwig efforts is saved in text form, and is at least there to look at. It contains the (copied) textual description of the footprints as well, so changing them will not affect existing layout.
Someday, perhaps, I will write some code to manipulte such files - hopefully using Lisp.
GEDA PCB is uniquely positioned at a particularly interesting, hackable local maximum. Usually, software quickly evolves to be opaque - obfuscated by design, or naturally through internal complexity.
GEDA PCB is simple and I am amazed that it has managed to remain that way throughout its long lifetime. It manages to work alongside the schematic subsystem in a manner matching most workflows, and yet, functions alone in a most delightful way.
It is not without quirks, or historical baggage (the many footprint formats, for instance). But it works, and it works as expected to make manual layout enjoyable.
I haven't seen any other package that allows importing arbitrary nets and working without a schematic.