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Submitted by: /\/\yotis
CandyMan:
Greets from a fellow hacker from Georgia! I have included the following from
the /\/\otorola technical semiconductor data book:
Part Number: MC145477P (16-pin plastic dip) , MC145477DW (SOIC 16-pin surface
mount).
Type: Calling line identification (CLID) receiver with ring detector
The MC145477 is a silicon gate HCMOS IC designed to demodulate Bell 202
and V.23 1200-baud FSK asynchronous data. The primary application for this
device is in products that will be used to receive and display the calling
number, or message wating indicator sent to subscribers from central office
facilities of the public switched network. The device also contains a carrier
detect circuit and ring detector which may be used to power up the device.
Applications for this device include adjunct boxes, answering machines,
feature phones, fax machines, and computer interface products.
The MC145477 offers the following performance features:
-Ring Detector On Chip
-Ring Detector Output for MCU Interrupt
-Power Down Mode, Less than 1#a
-Single Supply: +3.5 to 6.0 V
-Pin Selectable Clock Frequencies: 3.68 MHz, 3.58 MHz, or 455 kHz
-Two Stage Power Up for Power Management Control
-Demodulates Bell 202 and V.23
+------------+
TI ++1O 16++ Vdd
++ ++
RI ++2 15++ DOC
++ ++
RDI1 ++3 14++ DOR
++ ++ ___
RDI2 ++4 13++ CDO
++ ++ ___
NC ++5 12++ RDO
__ ++ ++
RT ++6 11++ CLKSIN
_____ ++ ++
PWRUP ++7 10++ OSCin
++ ++
Vss ++8 9++ OSCout
++ ++
+------------+
-------------------------------------------------------------------------------
Pin Descriptions:
TI: Tip Input (Pin 1)
This input pin is normally connected to the tip side of the twisted pair.
It is internally biased to 1/2 supply voltage when the device is in the
power up mode. This pin must be DC isolated from the line.
RI: Ring Input (Pin 2)
This input pin is normally connected to the ring side of the twisted pair.
It is internally biased to 1/2 supply voltage when the device is in the
power up mode. This pin must be DC isolated from the line.
RDI1: Ring Detect Input 1 (Pin 3)
This input is normally coupled to one of the twisted pair wires through
an attenuating network. It detects energy on the line and enables the
oscillator and precision ring detector circuitry.
RDI2: Ring Detect Input 2 (Pin 4)
This input to the precision ring detection circuit is normally coupled to
one of the twisted pair wires through an attenuating network. A valid ring
___
signal as determined from this input sends the RDO (Pin 12) to a logic 0.
__
RT: Ring Time (Pin 6)
An RC network may be connected to this pin. The RC time constant is chosen
to hold this pin voltage below 2.2v between the peaks of the ringing
__
signal. RT is an internal power-up control and activates only the
circuitry
neccessary to determine if the incoming ring is valid
_____
PWRUP: Power Up (Pin 7)
_____
A locic 0 on the PWRUP input causes the device to be in the active mode
ready to demodulate incoming data. A logic 1 on this pin causes the device
__
to be in the standby mode, if the RT input pin is at logic 1. This pin may
___ ___
be controlled by RDO and CDO for auto power-up operation. For other app-
lications, this pin may be controlled externally.
Vss: Ground (Pin 8)
Ground return pin it typically connected to the system ground.
OSCout: Oscillator Output (Pin 9)
This pin will have either a crystal or ceramic resonator tied to it with
the other end connected to OSCin.
OSCin: Oscillator Input (Pin 10)
This pin will have either a crystal or ceramic resonator tied to it with
the other end connected to OSCout. OSCin may also be driven directly from
an appropriate external source.
CLKSIN: Clock Select Input (Pin 11)
A logic 1 on this input configures the device to accept either a 3.579 Mhz,
or a 3.6864 Mhz crystal. Note 3.579 Mhz is known as a "Color Burst"
crystal, and is readily available from Radio Shack. A logic 0 on this pin
configures the part to operate with a 455-kHz resonator.
___
RDO: Ring Detect Out (Pin 12)
This open-drain output goes low when a valid ringing signal is detected.
___
RDO remains low as long as the ringing signal remains valid. This signal
can be used for auto power up, when connected to pin 7.
___
CDO: Carrier Detect Output (Pin 13)
When low, this opwn drain output indicated that a valid carrier is present
___
on the line. CDO remains low as long as the carrier remains valid. An 8-ms
hysteresis is built in to allow for a momentary drop out of the carrier.
___ _____
CDO may be used in the auto power up configuration when connected to PWRUP.
DOR: Data Out Raw (Pin 14)
___
This pin presents the output of the demodulator whenver CDO is low. This
data stream includes the alternate 1 and 0 pattern, and the 150 mS of
marking, which precedes the data. All other times, DOR is held high.
DOC: Data Out Cooked (Pin 15)
___
This output presents the output of the demodulator whenever CDO is low,
and when in internal validation sequence has been successfully passed.
The output does not include the alternate 1 and 0 pattern. At all other
times DOC is held high.
Vdd: Positive Power Supply (Pin 16)
The digital supply pin, which is connected to the positive side of the
power supply.
-------------------------------------------------------------------------------
Applications Information:
The MC145477 has been designed to be one of the main funcional blocks in
products targeted for the CLASS (Custom Local Area Signaling Service) market.
CLASS is a set of subscriber features now being presented to the consumer by
the RBOC's (Regional Bell Operating Companies) and independant TELCOs. Amoung
CLASS features, such as distinctive ringing and selective call forwarding, the
subscriber will also have available a service known as Calling Number Delivery
(CND) and message waiting. With these services, a subscriber will have the
ability to display at a minimum, a message containing the phone number of the
calling party, the date, and the time. A message containing only this infor-
mation is known as a single format message, as shown in figure 9. An extended
message, known as multiple format message, can contain additional information
as shown in figure 10.
The interface should be arranged to allow simplex data transmission from the
terminating central office, to the CPE (Customer Premises Equipment), only when
the CPE is in an on-hook state. The data will be transmitted in the silent
period between the first and second power ring after a voice path has been
established.
The data signaling interface should conform to Bell 202 which is described as
follows:
-Analog, phase coherent, frequency shift keying.
-Logical 1 (Mark) = 1200 # 12 Hz
-Logical 0 (Space) = 2200 # 22 Hz
-Transmission rate = 1200 bps
-Application of data = serial, binary, asynchronous
The transmission level from the terminating C.O. will be -13.5 dBm #1.0. The
expected worst case attenuation through the loop is expected to be -20 dB. The
receiver therefore, should have a sensitivity of approximately -34.5 dBm to
handle the worst case installations.
Additional information on CLASS services can be obtained from:
BELLCORE CUSTOMER SVS.
1-800-521-2673
201-699-5800 Foreign Calls
201-699-0936 FAX
The document number is TA-NWT-000030
Title: "Voice Band Data Transmission Interface Generic Requirements"
-------------------------------------------------------------------------------
Please see CNID.GIF for schematic......
Cya l8r
/\/\yotis (Ruler of the UnderWurlde)
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