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AST RESEARCH, INC. TECHNICAL BULLETIN #0748 03-18-92
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BIOS SHADOWING IN AST SYSTEMS
This document presents information on the topic of BIOS shadowing.
Persistent misinformation and rumors abound on BIOS shadowing. If properly
informed most users should view shadowing as a positive and significant
performance enhancer rather than a feature to be avoided.
Performance:
System BIOS and video BIOS shadowing is done to improve performance. This is
done by executing the BIOS code out of RAM rather than ROM. A performance
gain is achieved by executing out of RAM because it has a much faster
response time than the ROM. The slower response time of the ROM acts as a
barrier to today's higher speed processors.
Shadowing Location:
During POST the system BIOS copies an image of itself as well as an image of
the video BIOS into RAM. The location where this image is copied depends on
the vendor's philosophies as well as hardware capabilities. The AST
philosophy is to follow the strategy of "in-place" shadowing. What in-place
shadowing means is that the system BIOS will be copied into RAM located at
F000:0 and the video BIOS will be copied into RAM located at C000:0. For
those familiar with the PC architecture, in-place shadowing locates the
shadowed BIOS at the same location as the ROM version (unshadowed BIOS).
Early in AST's systems history, the hardware was not able to support the in-
place shadowing strategy. The very early systems would shadow the system
BIOS at F000:0 but the video BIOS had to be shadowed at E000:0. Progress in
AST's hardware development made in-place shadowing possible for systems
starting in the latter part of 1989. The choice of shadowing in-place or not
is limited by hardware and is not a BIOS design issue.
Advantages of In-place:
Shadowing in-place has the significant advantage of conserving valuable upper
memory addresses. A typical unshadowed system will utilize a total of 96K
bytes of valuable address space between the 640K and 1M region. This is
allocated as 64K bytes at F000:0 for the system BIOS and 32K bytes at C000:0
for the VGA BIOS. The AST strategy of in-place shadowing utilizes exactly
96K bytes of this valuable address space when shadowing is activated. A
different shadowing strategy commonly utilizes 160K bytes of this address
space between 640K and 1M.
The chart below illustrates how the in-place shadowing strategy conserves
valuable upper memory addresses.
Upper Memory Address Utilization:
No Shadow In-Place Other Scheme
C0000-C7FFF VGA BIOS VGA BIOS VGA BIOS (ROM)
E0000-EFFFF not used not used VGA BIOS (Shadowed)
F0000-FFFFF system BIOS system BIOS system BIOS
total space 96K bytes 96K bytes 160K bytes
The second significant advantage of in-place shadowing is that it presents
the same characteristics as the typical unshadowed system. For programs which
"sniff" or search the 640K - 1M region, a system which has in-place shadowing
has the video BIOS and system BIOS in exactly the same locations as the
typical unshadowed system. There is no anomaly as in other shadowing
strategies which have a video BIOS located at C000:0 (the ROM image) as well
as at E000:0 (the shadow image).
Reserved Memory:
All current AST systems as well as all new AST designs have 128K bytes of
reserved memory set aside to support shadowing. All memory except this 128K
bytes is available to the user. The reserved memory is used as the shadow
RAM. There has been no attempt to design systems where only 96K is reserved
rather than 128K. Providing this extra 32K to the user would significantly
increase hardware costs.
There are a few exceptions to the 128K reserved memory rule. The Bravo
286/16 is an example of a system which gives reserved memory back to the
user. This extra 128K is available if shadowing is turned off in specific
memory configurations. Because of the costs and complications involved to
provide an extra 128K bytes of memory for the minority of users who wish to
disable shadowing, AST systems will continue with the 128K reserved memory
rule.
Write Protection:
Write protecting the shadowed BIOS is important as it prevents program bugs
or poorly designed programs from destroying the video or system BIOS images
in RAM. This issue affects AST as well as all system vendors. This write
protection attribute coupled with the in-place shadowing yields the perfect
shadowing scheme.
Systems with cache can present a wrinkle in write protecting the shadow RAM.
Until very recently, AST systems with cache did not provide the hardware
capability to write protect the video BIOS shadow area. Write protection of
the video BIOS shadow area was complicated by the fact that the cache was
caching the video BIOS addresses. (The system BIOS area has been write
protected as the cache does not cover the system BIOS addresses.) With the
exception of 486 based systems, recent AST designs now fully write protect
the shadowed BIOS areas.
The internal cache of the 486 chip presents a challenge to write protection
schemes which AST as well as all other vendors are faced with. Essentially
there are no hooks in the 486 which allow hardware designers to implement
write protection of shadowed areas which are covered by the 486's cache.
While full write protection could be achieved by preventing the 486 cache
from covering the video BIOS area, this results in a significant performance
degradation in video benchmarks.
The AST solution to the write protection dilemma of 486 systems is to write
protect the shadow RAM. While this does not prevent the cached copy of the
video BIOS from being overwritten, the cache will always be able to fetch a
correct copy from the protected shadow RAM whenever a cache load cycle is
done. This pseudo write protection of the video BIOS presents a much smaller
window of vulnerability to program bugs.
Permanent Shadowing:
All new AST systems and recent BIOS updates provide a feature called
permanent shadowing. This feature no longer provides the user with the
option to disable shadowing. With in-place shadowing and write protection of
the shadowed BIOS, there is little reason to disable shadowing. Disabling
shadowing only provides the user with a slower system. As mentioned earlier
the reserved memory is typically not returned back to the user when shadowing
is disabled.
Summary:
This paper has attempted to answer many of the persistent questions
surrounding shadowing. It has also reiterated the long term AST strategy
which, when implemented, results in the perfect shadowing scheme.