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From: dempson@atlantis.actrix.gen.nz (David Empson)
Newsgroups: comp.sys.apple2.programmer
Subject: Re: GS memory question
Date: 4 May 1996 11:05:43 +1200
Organization: Actrix - Internet Services
Lines: 194
Message-ID: <4me3g7$e28@atlantis.atlantis.actrix.gen.nz>
References: <andre.horstmann-0105960106460001@news.swix.ch>
NNTP-Posting-Host: atlantis.actrix.gen.nz
(Let me try that again - I managed to post the wrong file, and lost my
previous article in the process.)
In article <andre.horstmann-0105960106460001@news.swix.ch>,
Andre Horstmann <andre.horstmann@unifr.ch> wrote:
> Stupid question:
> How does the GS know, how much memory is installed?
The memory manager determines the RAM size as follows:
Starting at RAM bank $7F and working back to bank $02, the bank number
is written into the same location in each bank. The memory manager
then scans banks upwards from $02 to $7F, looking for unchanged values.
As soon as it hits a value which is not equal to the bank number, it
assumes that is the physical end of memory.
Any "hole" will probably contain a random number (there is a small
chance that this could falsely be identified as a valid bank). An echo
of an earlier bank will consistently have the wrong value in the
higher bank which contains the echo.
> Using the ghost bank techinque can't be, since changing the jumpers
> on my memory card changes the total memory indication in the Control
> Panels.
The jumpers are generally used to enable additional bits of the
address to be fed through to the decoding circuitry. If the card is
not fully populated, the jumpers are set to force the additional
address bits to zero or one, which cause the lower numbered banks to
echo into all higher banks.
If the card's size selection mechanism produces a hole which is not
preceded by echo banks, the RAM size could be miscalculated, and the
IIgs would crash very quickly.
I did a partial analysis of the OctoRAM design a few years ago. It is a
little hard to decipher my random scribblngs, but I can at least
understand what I wrote about the jumpers, and I can re-derive the rest.
The OctoRAM has five jumpers. It supports either 256KB or 1MB "rows"
on the card (using 256KB or 1MB SIMMs respectively), with one, two,
four or eight SIMMs installed. The possible memory sizes are 256KB to
8MB (7.875MB usable in ROM 1, 7MB usable in ROM 3).
Each jumper has three pins, with a standard 2-pin plug to select either
of two options. The manual lists all of the supported settings, which
I've summarised here. The jumpers are listed in order from top to
bottom. L indicates the jumper is on the left pair, R for the right pair.
Rows Installed 256KB SIMMs 1MB SIMMs
1 LLLLL LRRLL
2 LLLRL LRRRL
4 LLLRR LRRRR
8 RLLRR RRRRR
The jumpers are wired as follows:
Jumper Left Middle Right
1 Data input of LS375 Tied to left pin Tied to middle pin
(pulled up) of jumper 2
2 Data bus bit 4 Tied to right pin Data bus bit 6
of jumper 1
3 Tied to +5V MSIZE slot signal Tied to GND
4 "A" select input Tied to left pin CROW0 slot signal
of LS139
5 "B" select input Tied to left pin CROW1 slot signal
of LS139
Summarising the function of each jumper:
Jumper 1 selects whether a bit from the data bus is connected to a
data input of the LS375 (a 4-bit bistable latch). The bit is selected
using jumper 2, which is set according to the row size.
If jumper 1 is in the left position, the LS375 data input is pulled
high. This goes into the row select logic, and will force one of the
top four rows on the card to be selected.
If jumper 1 is in the right position, the LS375 can latch a bit from
the bank address provided on the data bus by the CPU during the first
half of the cycle. This allows the card to select between the top or
bottom four rows. In this position, the card can support 8 rows, but
is not compatible with DMA (except with a RamFast).
Jumper 2 selects which data bus bit is used if jumper 1 is in the
right position. The left position is used with a row size of 256K (D4 =
bank select between $00-$0F and $10-$1F,or subsequent echoes). The
right position is used with a row size of 1MB (D6 = bank select
between $00-$3F and $40-$7F).
Jumper 3 sets the MSIZE signal, which tells the IIgs motherboard what
size of RAM is installed. The left position indicates 256KB rows
(MSIZE=1), the right indicates 1MB rows (MSIZE=0).
Jumper 4 enables decoding of bit 0 of the row number. In the left
position, the low-order select input of the 2-to-4 decoder is pulled
high, forcing an odd numbered row to be selected. This setting is used
with a single row installed.
In the right position, CROW0 goes to the decoder, allowing selection
between odd numbered and even numbered rows on the card (required for
two or more rows installed).
Jumper 5 enables the decoding of bit 1 of the row number. It is
similar to jumper 4: the left position forces bit 1 high, forcing row
2/3 or 6/7 to be selected, and the right position enables CROW1, which
allows selection between rows 0/1 or 2/3, and 4/5 or 6/7.
With this information it is possible to number the banks on the
OctoRAM (in conjunction with the diagram that shows the installation
order, and a continuity tester to confirm the order for higher banks):
Row 5 (3rd SIMM) Row 7 (1st SIMM)
Row 4 (4th SIMM) Row 6 (2nd SIMM)
Row 3 (5th SIMM)
Row 2 (6th SIMM)
Row 1 (7th SIMM)
Row 0 (8th SIMM)
The address decoding for 1MB SIMMs can be worked out as follows (256KB
is similar). For the specified bank number and number of enabled rows,
the value in the table is the row number which is selected.
For a ROM 1 IIgs:
Banks --Enabled Rows--
1 2 4 8
$00-$01 (motherboard)
$02-$11 7 6 4 0
$12-$21 7 7 5 1
$22-$31 7 6 6 2
$32-$41 7 7 7 3/7 (see below)
$42-$51 7 6 4 4
$52-$61 7 7 5 5
$62-$71 7 6 6 6
$72-$81 7 7 7 7/- (see below)
With eight SIMMS installed in the ROM 1, banks $32-$41 access two
different rows on the card, because the data bus bit comes into play.
When accessing banks $32-$3F, D6 is low, which causes row 3 to be
selected. When accessing banks $40 and $41, D6 is high, which causes
row 7 to be selected. A similar split takes place in banks $72-$81.
Note: banks $80 and $81 are not available, because the FPI doesn't
select the memory slot when addressing this area. This means that the
first 128KB in the ROM 3 SIMM is not used.
For a ROM 3 IIgs:
Banks --Enabled Rows--
1 2 4 8
$00-$0F (motherboard)
$10-$1F 7 6 4 0
$20-$2F 7 7 5 1
$30-$3F 7 6 6 2
$40-$4F 7 7 7 7
$50-$5F 7 6 4 4
$60-$6F 7 7 5 5
$70-$7F 7 6 6 6
Note that banks $40-$4F selects row 7, not row 3, again due to D6
being high. Also note that row 3 is not used at all, so you can set up
an 8MB configuration on a ROM 3 (including the motherboard RAM) with
only 7 SIMMs, leaving out row 3. (I have not verified if this works.)
As you can see from my analysis, no matter how the jumpers are set, a
row of memory will always be selected when addressing the memory card
space. As long as SIMMs are installed in the correct order, there will
not be any holes, and the IIgs cannot make a mistake about the total
RAM size.
Other RAM cards should follow a similar design. Most are simpler,
because they don't support both 256KB and 1MB row sizes, and only
support four or fewer rows.
The cards which support special features like piggyback cards are a
different matter entirely.
--
David Empson
dempson@actrix.gen.nz
Snail mail: P.O. Box 27-103, Wellington, New Zealand