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Bio: Restored Apollo Guidance Computer, Xerox Alto. Reverse-engineering old chips. Analog computing. Added ₿ to Unicode. Charger teardowns. Arduino IRremote library.
Location: Silicon Valley
Why don't you pass the time with a game of solitaire?
Looks like it turned out to be a nightmare puzzle. It seems like you're doing it approximately by functional groups, but haven't done the ALU and carry lookahead. Maybe those aren't as recognizable.
ICs usually have ESD protection diodes to shunt excess voltage to Vcc or ground. More complex circuits are also used. For more info see:
ti.com/lit/an/slya014…
Anyone else remember the Poly-Pak "barrel kit" grab bags?
archive.org/details/197801… pic.twitter.com/XUbt7HaGbC
My talk on reverse engineering vintage ICs from hardwear.io. twitter.com/hardwear_io/st…
Thanks for the kind comment
The row address selects one row of cells and all 128 bits are read by the sense amps. Then the column address selects one of the 128 bits to read or write. Essentially decoders built from 128 NOR gates. I think LCDs are based more on shifting instead of random access.
I was puzzled by the ∫dt logo on the module. It's "Integrated Device Technology".
It's just a pass through, wiring the two chips in parallel except the select lines are separate so the desired chip can be selected. So the chips are 16 pin but the carrier is 18 pin. I tried to sand and grind through the carrier to see the wiring but the ceramic was too tough.
My main problem is fitting a random collection of topics into one book. If I ever stick to one subject, maybe I'll make a book. Also, my blog posts are heavy on photographs, which would make a book expensive.
Each sense amplifier also acts a latch (due to cross-coupling) to hold the value for the write-back operation. To refresh, you read a row into the sense amplifiers and then it is written back.
I'm writing a more detailed blog post. To summarize, 128 sense amplifiers sit between the two memory banks. Basically differential amplifiers comparing cell voltages from both sides. The unselected side provides a "dummy" voltage so the amp yields a 0 or 1 for the selected side.
Mostek made 32-kilobit memory modules by combining two 16-kilobit chips onto a DIP carrier. Customers such as Apple doubled their memory density without switching to newfangled surface-mount components. Each memory cell is a tiny capacitor and transistor.
righto.com/2020/10/inside… pic.twitter.com/kDkUJ0yxPl
The minimum clock frequency was largely due to dynamic pass-transistor logic. If the transistor is off for too long, the charge leaks away. The Z-80 was designed so only one clock phase used pass transistors. In the other phase, everything was static so you could stop the clock.
The famous Signetics write-only memory datasheet: repeater-builder.com/molotora/gonto…
repeater-builder.com/molotora/gonto…
That's a sonic delay line, storing bits as sound pulses in a long nickel wire. That one looks like it's from Ferranti, but I wrote about IBM's use of sonic delay lines to store pixels in video display terminals.
righto.com/2019/11/ibm-so…
ROM and RAM: you're using the terms wrong. Please maintain the correct distinction.
From Electronics, 1973: archive.org/details/sim_el… pic.twitter.com/btujILVILb
I think the little nub is a connection to the chip's substrate so a charge pump on the chip can apply a bias voltage. Here's a picture of the 8086 die with small squares above and below for the substrate bias. I wrote more about this here: righto.com/2020/07/inside… pic.twitter.com/Pdm9nNi15q
I don't know how easily current fabs could support the old metal-gate process. It's probably a matter of how much you're willing to pay.
Factors: 1 Different scale of features: in modern chips you see large functional blocks, not individual wires and transistors. 2 Modern standard cell logic obscures the structure. 3 Multiple metal layers hide what's underneath; a die photo with metal removed may make more sense.
The original EPROM is NMOS. It uses 21 volts to force charge into the floating gate to store a bit. Erased by ultraviolet ionizing the insulating oxide, letting the charge escape. The CMOS version is programmed with 13 volts, probably using capacitors to double the voltage.
Before flash, the reprogrammable 2732 EPROM held 4K of code. Erased via UV light, the round quartz window let the UV reach the die. Counterfeit found by kjo: the second is CMOS version, relabeled as the vintage chip. 21 volts to program: big green capacitors are voltage doubler? pic.twitter.com/6lBoGbEU8B
There's a whole book ("Anatomy of a High-Performance Microprocessor") discussing the low-level internals of the K6, so the K7 would probably take multiple books :-)
I'm glad some people read the footnotes :-) That footnote could probably be expanded to a full article, but my blog post was getting out of control as it was, so I figured a footnote was the best place.
Thanks!
I prefer bubbles for PMOS too, but strangely Intel's 4004 and 8008 schematics don't use arrows or bubbles on the transistors. pic.twitter.com/43GkegVHA2
The earliest reference I could find for a bootstrap loader is 1965. If a computer needs software to load its software, it's a seemingly-impossible circular action similar to pulling yourself up by your (physical) bootstraps. Some earlier references to bootstrapping compilers.
Yes, I mention that in the article. Federico Faggin's innovation was applying the bootstrap load to silicon-gate transistors. The tricky part is that you can't easily dope the silicon under the polysilicon gate so the capacitor's upper plate blocks creation of the lower plate.
The bootstrap load pulls the voltage up higher than its input. It's analogous to pulling oneself up by one's bootstraps. You can't physically lift yourself up by pulling on your bootstraps, of course. But the electrical circuit actually works, giving you more voltage than put in.
The "bootstrap load" was a capacitor circuit that helped make the Intel 4004 and 8008 processors possible. This mini charge pump boosted the voltage on transistor gates, increasing the output. The 8008 processor led to modern x86 processors.
righto.com/2020/10/how-bo… pic.twitter.com/hm8LaxBINY
Sorry, I'm not too good with transistors and don't have a suggestion.
Looks like an interesting chip, but I already have too many chips I'm looking at.
Yes, two 4116 memory chips in leadless chip-carrier packages, soldered onto the ceramic substrate.
From the maker of the miniature IBM 1401 system... twitter.com/6502b/status/1…
The serious answer is that the two memory chips are wired in parallel, except for the pairs of select lines, allowing one of the chips to be selected.
An integrated circuit with two baby chips on its back. pic.twitter.com/CLNZxNj0kb
What do you see as the main similarities?
An IBM 1401 fan in Toronto? The Computer History Museum's 1401 room has a wall-sized image from 1963 of the IBM data center that used to be on King St E in Toronto. The windows of this datacenter let people on the street watch the computers. Now the site is a Japanese restaurant. pic.twitter.com/EQIwd5mDUI
For IBM 1401 fans, check out this video of an amazing miniature model of a 1401 and peripherals with a vintage narration. My favorite part: tiny cards getting loaded into the card reader with tweezers. twitter.com/vcfederation/s…
Objectively, how does the 8008 image work as a puzzle? Challenging? Too difficult? Too repetitive? Educational? Do you think a better IC puzzle would scale up, e.g 80x86, or scale down, e.g. 555 timer?